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Circuits and Systems

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Education at Circuits & Systems

MSc thesis projects

Here is a list of possible MSc thesis projects. This is intended just to give an idea, actual projects are usually defined after discussion with the advisor.

Signal processing for communication; array signal processing

 
  • Multicarrier Wakeup Radio Implementation
    (With IMEC-NL, Eindhoven) Wakeup radio is an ultra-low power radio used for channel monitoring. A multicarrier wakeup radio has recently been developed by IMEC-NL. How does it work? Can it be improved? How can it be implemented?

  • Routing Algorithm Development and Implementation
    (With IMEC-NL, Eindhoven) A wakeup radio is a low-power radio device that can be used for channel monitoring, but it can also be used as a relay for routing messages in a network. This project deals with the development of such relay and routing protocols as well as with the implementation of these protocols on a microcontroller.

  • Signal processing techniques to improve photoacoustic images
    (With Erasmus Medical Center) Photo-acoustic imaging is a relatively new modality for biomedical diagnostics. Current measurements are highly corrupted by interference and noise. Can you filter these out?

  • Smart Mobile Process Environment Actuators and Sensors (Smart PEAS)
    We are developing "PEAS", small sensor nodes that are floating in a chemical reactor tank and report measurements. The aim of the project is to receive the data and also to localize the nodes.

  • Internship with TNO-ICT: Localisation of nodes in a wireless sensor network - data acquisition, processing and representation
    TNO-ICT has a 3-month project on localisation of sensor nodes (data acquisition, processing).

  • Projects at DEVLAB
    DEVLAB (Development Club) is a network of 12 small/medium size technology companies that collaborate with universities on topics in the ares of sensor network technology, embedded communication, and advanced micro actuators. They maintain a list of thesis projects that may be interesting for MSc students.

  • Practical Aspects of Compressive Sensing in Radar and Communications
    (With Thales NL, Delft) Compressive Sensing (CS) is a new paradigm in sensing (blooming since 2004) that works with a reduced number of samples for the same (if not better) result. Thus, CS offers a good mean to reduce complexity and costs (not only in video cameras and medical sensors but also) in radar and communication systems. The aim of this project is to investigate the sensitivity to low SNR and CS-grid mismatch in CS for radar and communication systems, based on simulations as well as real measurements.

  • Calibration and imaging with future radio telescopes
    (Possibly with ASTRON, Dwingeloo.) LOFAR (Low Frequency Array) is a next generation radio telescope which is currently under design. It will consist of ~10,000 antennas. Calibration and interference cancellation are critical aspects that determine the final sensitivity of the instrument, and as yet unsolved.

  • Human clock estimation
    (With Philips Research, Eindhoven) Humans are equipped with a biological clock located in the brain whose oscillation influences most of our behavioural and physiological processes. Can we recover the clock status from noisy measurement data?

  • Compressive spectrum sensing
    In the future, ad hoc communication systems will be allowed to temporarily use RF spectrum that primary users do not need. To enable this, it will be necessary to scan a wide frequency band to locate the spectrum "holes". But directly sampling a GHz-wide spectrum is very expensive. The goal in this project is to work on spectrum sensing algorithms that are based on sub-Nyquist-rate sampling, which is labeled compressive spectrum sensing.

  • Spectrum sensing for low-power wireless sensor networks
    The limited availability of spectral resources calls for more efficient ways of spectrum usage in future wireless networks. Cognitive radios are an interesting solution to the spectral congestion problem, where the available resources are dynamically used across time and frequency in an opportunistic manner. In this project, several aspects of spectrum sensing can be investigated with a main focus on the energy efficiency of the sensing.

  • Broadband beamforming for seismic arrays
    Geophysical experiments for e.g. oil exploration uses arrays of sensors. Current beamforming techniques are often quite straightforward and are not suitable for filtering out near-field interference. Can a space-time filter be developed that does this?

  • OFDM for Underwater Communications
    (With TNO, The Hague) Underwater communication is subject to severe delay and Doppler spreading effects. This causes major problems if high data rate underwater communications is required, and asks for sophisticated communications schemes to solve the problem.

  • Digital TV in a mobile environment
    The terrestrial standard for DTV does not support mobility. How can this be accommodated?

  • Space-time coding for time- and frequency-selective channels
    The use of multiple antennas at the transmitter and the receiver can increase capacity dramatically. How does this work for channels which are both time- and frequency varying?

  • VLSI System design/realization and automation (2012)

    The objectives of these projects are to conceive, develop, implement and experimentally validate an innovative system design framework: a low-power design platform which will enable cost-efficient design of complex, mobile, reconfigurable and power conscious systems in a suitably short time. This platform is defined as the combination of hardware components, communication architecture, software, design methodologies, test-benches, application development rules and documentation. It will be the enabling technology for the future design of electronic appliances. The following examples of MSc thesis projects are for both CE as also ME and ES students. They serve as indications of what is possible. As the world changes, projects change....
     
  • Real-time synchronization system for car-to-car communication
    A key bottleneck in car-to-car communication is the doppler shift. This is even more so in "high-rate" underwater communication systems. The goal of the project is to implement advanced synchronization algorithms (developed in our group) in VHDL, for an FPGA or even ASIC design.

  • Specification, Optimization and realization of complex compute blocks
    These type of projects target a VLSI implementation of complex compute blocks. The end goal is to design a chip in for example UMC or TSMC 90nm technology. Examples of these blocks are SVD, QR, or matrix solvers.

    • SystemC-AMS system modelling

      Beyond Dreams is an international research and development project, which has the goal to produce an open-source version on the new SystemC-AMS standard. (http://www.systemc-ams.org/). As partner of this project we want to develop software tools, which can generate, synthesize, translate various representations of electronic systems. Especially the 'self generating' property of C++ classes is something to explore.

      We want to investigate how to generate complex compute blocks starting with high level language constructs. Also, we want to be able to analyze the performance of an algorithm and develop software tools to do so.

    • This year we want to start with the design of 'BRAIN CELLS'. We will start with the development of basic models which allow us to simulate particulair brain cells. In the first instance this will be an IO cell which consists of a Dendrite, Soma and Axon cell. Simulation models of each of those human brain cells exist and we will use those to develop blocks which can be implemented in hardware (e.g. an FPGA). We will model the cells using SystemC and use commercial synsthesis tools to generate VHDL netlists.

    • Two types of activities will be started: 1) high level optimization in order to determine performance parameters, 2) and high level C++ to implemented the design (Catapult C), or C2S (Cadence).

  • COBRA
    • SoC power and temperature management system
      Design and implementation of a power management / temperature management system, which has 3 parts: a software driver (ECOS), a hardware controller (VHDL), and a DC-DC converter. The goal is to design a complete system: we will use SystemC-AMS as simulation tool, and C synthesis tools. This work started in 2010, and will be continued in 2012/2013.

    • Reliable Homogenous multi-processor array.
      The goal is to design a reliable system based upon an array of processors (4) e.g. based on the Xilinx Microblaze machine, connected with a NoC. We want to investigate how this system reacts to 'faults', for example when a component malfunctions or due to aging of the components. Thereafter we need to develop measures to ensure that these 'faults' are remedied or at least detected and reported. This is a system level project; We will use SystemC as modeling tool.

    • Homogenous multi-processor array (1).
      The goal is to design an array of processors (4) based on the Xilinx Microblaze machine, connected with a NoC. This work started in 2010, and will be continued in 2012/2013. Two type of projects will be started: 1) high level simulation description using SystemC in order to determine performance parameters, and 2) design of prototype processor array using an array of Xilinx Spartan 6 devices.

    • Homogenous multi-processor array(2).
      The goal is to design an array of processors (4) based on the R-Vex, connected with a NoC. We will use existing VHDL code of the R-Vex and the NoC and build a prototype implementation using a Xilinx Virtex-6.

    • Homogenous multi-processor array(3).
      The goal is to develop compiler support for the array of Microblaze compatible processors. We need code generation to make efficient use of the transactional memory.
  • Design and verification aspects of Large Deep-Submicron Integrated Circuits

     
  • SPAD Lidar for Hazard Avoidance during Landing on Moon or Mars
    Hazard Avoidance is a key part of autonomous landing on Mars, Moon or space bodies such as asteroids. In the project, an optical sensor for a LIDAR imaging system has to be developed.

  • On-Chip Photonic Generation and Detection
    In this project we aim at the design of a monolithic integrated circuit where very small photon fluxes are generated, transported, and detected. The goal is to build the first fully-integrated, silicon-only, CMOS module comprising of all three fundamental blocks of a complete photonic component.

  • Single-Photon Detector in a Transmission Electron Microscope
    In this project we aim at the design of a monolithic single-photon camera that will operate inside a transmission electron microscope (TEM) to capture scattering of targets in the vacuum retaining the information of the timing of these emissions to reconstruct a better image at a higher resolution.

  • FPGA based Time-to-Digital Converter (TDC)
    A high-speed time-to-digital converter (TDC) is an essential part of a wide range of applications (e.g. PET scanners, 3D imaging). Can you design the next generation of TDC?

  • High speed 3-D camera using MEGAFRAME
    Implement a 3D camera for medium range operation (5-50m) combining time-of-flight and triangulation in CMOS.

  • Event-driven readout for single-photon imagers
    The MEGAFRAME chip is equipped with a readout circuitry following compressed sensing techniques. This needs to be improved so that a frame rate of up to 1Mfps can be achieved.

  • SPSD pixel optimization
    Single-photon synchronous detection (SPSD) is a technique by which time-resolved imaging can be performed very efficiently for time-of-flight evaluations. Our current implementation is still big and we need a new miniaturized version designed in CMOS.

  • SPAD array for applications in charged particle detectors
    Several experiments in physics (e.g. Large Hadron Collider at CERN in Geneva) produce charged particles that need to be detected. For this one could use our SPAD imaging technology. Can you make SPAD arrays specific for such applications?

  • Micro fluidics and micro/nano structures in CMOS
    Fabricate a micro fluidics analysis system using standard CMOS processes together with highly sensitive CMOS sensors.

  • Surface Plasmonics
    Plasmonics are "new" propagation methods, similar to waveguides on a chip. Our aim is to build CMOS devices that show plasmonic behavior, but first we need to better understand this behavior on typical materials used in the CMOS industry.

  • An Efficient Temperature Simulation Tool for Hyperthermia Treatment Planning and Verification
    For cancer treatments using EM fields generating heat, we need to develop better models that can predict the temperature distribution in the human body during radiation.

  • Label-free CMOS DNA Sensing
    In bio-chemistry, DNA sequencing is based on cutting DNA into short strings of bases, and detecting the presence of these strings. We are setting up a new lab for doing the detection using very sensitive CMOS imaging chips.

  • Activity evaluation of logic functions
    Exploration of the switching activity properties of different classes of applications, to help with chip planning for power consumption, substrate noise, and decoupling.

  • Exploration of substrate noise sensitivity
    How can a counter-measure called 'triple well' or 'buried well' reduce the problem of substrate noise coupling in circuit topologies such as ring oscillators in 90 nm technologies or below.

  • Voltage Drop Analysis in Large Integrated Circuits
    Voltage drop analysis refers to the process of computing the local voltages in the power supply network of integrated circuits with the aim of verifying that they are below a certain value, to ensure correct functioning of the chip.

  • Placement / Floorplanning
    Placement and floorplanning aim at optimizing the physical design of a chip by shaping and positioning the constituting modules. This currently is a lively field of research and development.

  • Extraction
    This topic aims at improved extraction of power and ground nets.

  • Clock Tree Synthesis
    Clock trees in large digital integrated circuits need very advanced design tools to guarantee all desired clock timing properties.


  • |  Apr 26, 2012  |

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